Keep skipped values, split reads more
This commit is contained in:
parent
8408517b7d
commit
9fe38095fb
2 changed files with 19 additions and 7 deletions
23
main.go
23
main.go
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@ -142,12 +142,12 @@ func readRegs(vals map[uint16]float64, client modbus.Client, start, qty uint16)
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}
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}
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val, err := reg.read(data[(addr-start-1)*2:])
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val, err := reg.read(data[(addr-start-1)*2:])
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if err != nil {
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if err != nil {
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if errors.Is(err, errSkippableRead) {
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if !errors.Is(err, errSkippableRead) {
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log.Printf("Couldn't parse input register data at %d, skipping: %v", addr, err)
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continue
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}
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return fmt.Errorf("parse input register data at %d: %v", addr, err)
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return fmt.Errorf("parse input register data at %d: %v", addr, err)
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}
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}
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log.Printf("Couldn't parse input register data at %d, skipping: %v", addr, err)
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val = lastValues[addr]
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}
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//fmt.Printf("%s: %v %s\n", reg.name, val, reg.unit)
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//fmt.Printf("%s: %v %s\n", reg.name, val, reg.unit)
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vals[addr] = val
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vals[addr] = val
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}
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}
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@ -171,13 +171,22 @@ func scrape() error {
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vals := make(map[uint16]float64)
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vals := make(map[uint16]float64)
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start := time.Now()
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start := time.Now()
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scrapeStart.SetToCurrentTime()
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scrapeStart.SetToCurrentTime()
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if err := readRegs(vals, client, 5000, 50); err != nil {
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if err := readRegs(vals, client, 5001, 24); err != nil {
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return err
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return err
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}
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}
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if err := readRegs(vals, client, 5050, 50); err != nil {
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if err := readRegs(vals, client, 5031, 7); err != nil {
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return err
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return err
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}
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}
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if err := readRegs(vals, client, 5100, 50); err != nil {
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if err := readRegs(vals, client, 5049, 1); err != nil {
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return err
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}
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if err := readRegs(vals, client, 5083, 18); err != nil {
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return err
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}
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if err := readRegs(vals, client, 5113, 1); err != nil {
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return err
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}
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if err := readRegs(vals, client, 5144, 6); err != nil {
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return err
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return err
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}
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}
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@ -54,10 +54,12 @@ var sungrowInputRegs = map[uint16]*register{
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5022: {"phase_a_current", u16req, 0.1, "A"},
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5022: {"phase_a_current", u16req, 0.1, "A"},
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5023: {"phase_b_current", u16opt, 0.1, "A"},
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5023: {"phase_b_current", u16opt, 0.1, "A"},
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5024: {"phase_c_current", u16opt, 0.1, "A"},
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5024: {"phase_c_current", u16opt, 0.1, "A"},
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5031: {"output_real_power", u32req, 1, "VA"},
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5031: {"output_real_power", u32req, 1, "VA"},
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5033: {"output_reactive_power", s32opt, 1, "VAr"},
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5033: {"output_reactive_power", s32opt, 1, "VAr"},
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5035: {"power_factor", s16opt, 0.001, ""},
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5035: {"power_factor", s16opt, 0.001, ""},
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5036: {"frequency", u16req, 0.1, "Hz"},
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5036: {"frequency", u16req, 0.1, "Hz"},
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5049: {"nominal_reactive_power", s16opt, 0.1, "kVA"},
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5049: {"nominal_reactive_power", s16opt, 0.1, "kVA"},
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5083: {"meter_power", s32req, 1, "W"},
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5083: {"meter_power", s32req, 1, "W"},
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@ -71,6 +73,7 @@ var sungrowInputRegs = map[uint16]*register{
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5099: {"total_import_energy", u32req, 0.1, "kWh"},
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5099: {"total_import_energy", u32req, 0.1, "kWh"},
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5113: {"daily_running_time", u16req, 1, "m"},
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5113: {"daily_running_time", u16req, 1, "m"},
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5144: {"total_power_yield_2", u32req, 0.1, "kWh"},
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5144: {"total_power_yield_2", u32req, 0.1, "kWh"},
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5148: {"frequency_2", frequency2, 0.01, "Hz"},
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5148: {"frequency_2", frequency2, 0.01, "Hz"},
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}
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}
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